Böcker i Analog Circuits and Signal Processing-serien

This book presents new circuits and systems for implantable biomedical applications targeting neural recording. The authors describe a system design adapted to conform to the requirements of an epilepsy monitoring system.

This book describes the design and implementation of energy-efficient smart (digital output) temperature sensors in CMOS technology. It is shown that DTMOSTs are capable of achieving low inaccuracy (+/-0.4 DegreesC over the military temperature range) as well as sub-1V operation, making them well suited for use in modern CMOS processes.

This book provides a comprehensive treatment of security in the widely adopted, Radio Frequency Identification (RFID) technology. The authors present the fundamental principles of RFID cryptography in a manner accessible to a broad range of readers, enabling them to improve their RFID security design.

AC-DC conversion from the mains to a low voltage DC is discussed, enabling an efficient and compact, lower-power auxiliary power supply to take over the power delivery during the standby mode of mains-connected appliances, allowing the main power converter of these devices to be shut down fully.

This book introduces readers to the potential of charge-sharing (CS) successive approximation register (SAR) analog-to-digital converters (ADCs), while providing extensive analysis of the factors that limit the performance of the CS topology.

This new edition includes a variety of useful updates, including coverage of power efficiency and comprehensive optimization methodologies for DC-DC voltage multipliers, modeling of extremely low voltage Dickson charge pumps, and modeling and optimum design of AC-DC switched-capacitor multipliers for energy harvesting and power transfer for RFID.

This book describes the life cycle process of IP cores, from specification to production, including IP modeling, verification, optimization, and protection.

These three techniques enable respectively, cascading of radio frequency (RF) and baseband (BB) circuits under an ultra-low-voltage (ULV) supply, cascading of RF and BB circuits in current domain for current reuse and a novel function-reuse receiver architecture, suitable for ULV and multi-band ULP applications such as the sub-GHz ZigBee.

This book presents the cross-layer design and optimization of wake-up receivers for wireless body area networks (WBAN), with an emphasis on low-power circuit design.

This book offers a novel approach to the analysis and design of all-digital phase-locked loops (ADPLLs), covering time-to-digital converters, noise shaping and more. Includes advice on analysis and simulation techniques, and reusable Matlab code.

This book describes a unique approach to smart receiver system design. It starts with the analysis of a very basic, single-path receiver structure, then using similar methods, extends the analysis to a more complicated multi-path receiver.

This book focuses on the development of circuit and system design techniques for millimeter wave wireless communication systems above 90GHz and fabricated in nanometer scale CMOS technologies. This book serves as a valuable reference for millimeter wave designers, working at both the transistor level and system level.

The RF front-end - antenna combination is a vital part of a mobile phone. This book offers a unique account of adaptive RF front-ends. It includes an analysis on the impact of fluctuating environmental parameters, and a generic protection concept is presented.

This book describes the design of a high performance time-interleaved ADC, with much attention given to practical design aspects aimed at both industry and research. There is focus on low-power design techniques including successive approximation ADCs.

This book introduces a new approach to model and predict substrate parasitic failures in integrated circuits with standard circuit design tools.The injection of majority and minority carriers in the substrate is a recurring problem in smart power ICs containing high voltage, high current switching devices besides sensitive control, protection and signal processing circuits.The injection of parasitic charges leads to the activation of substrate bipolar transistors. This book explores how these events can be evaluated for a wide range of circuit topologies. To this purpose, new generalized devices implemented in Verilog-A are used to model the substrate with standard circuit simulators. This approach was able to predict for the first time the activation of a latch-up in real circuits through post-layout SPICE simulation analysis.Discusses substrate modeling and circuit-level simulation of parasitic bipolar device coupling effects in integrated circuits;Includes circuit back-annotation of the parasitic lateral n-p-n and vertical p-n-p bipolar transistors in the substrate;Uses Spice for simulation and characterization of parasitic bipolar transistors, latch-up of the parasitic p-n-p-n structure, and electrostatic discharge (ESD) protection devices;Offers design guidelines to reduce couplings by adding specific protections.

It covers the complete design flow, from link budget assessment to the transistor-level design of different RF front-end blocks, such as mixers and power amplifiers, presenting different alternatives and discussing the existing trade-offs.

This book presents state-of-the-art techniques for radiation hardened high-resolution Time-to-Digital converters and low noise frequency synthesizers. Throughout the book, advanced degradation mechanisms and error sources are discussed and several ways to prevent such errors are presented. An overview of the prerequisite physics of nuclear interactions is given that has been compiled in an easy to understand chapter. The book is structured in a way that different hardening techniques and solutions are supported by theory and experimental data with their various tradeoffs.Based on leading-edge research, conducted in collaboration between KU Leuven and CERN, the European Center for Nuclear ResearchDescribes in detail advanced techniques to harden circuits against ionizing radiationProvides a practical way to learn and understand radiation effects in time-based circuitsIncludes an introduction to the underlying physics, circuit design, and advanced techniques accompanied with experimental data

¿This book describes an ECG processing architecture that guides biomedical SoC developers, from theory to implementation and testing. The authors provide complete coverage of the digital circuit implementation of an ultra-low power biomedical SoC, comprised of a detailed description of an ECG processor implemented and fabricated on chip. Coverage also includes the challenges and tradeoffs of designing ECG processors.Describes digital circuit architecture for implementing ECG processing algorithms on chip;Includes coverage of signal processing techniques for ECG processing;Features ultra-low power circuit design techniques;Enables design of ECG processing architectures and their respective on-chip implementation.

With the fast advancement of CMOS fabrication technology, more and more signal-processing functions are implemented in the digital domain for a lower cost, lower power consumption, higher yield, and higher re-configurability. This has recently generated a great demand for low-power, low-voltage A/D converters that can be realized in a mainstream deep-submicron CMOS technology. However, the discrepancies between lithography wavelengths and circuit feature sizes are increasing. Lower power supply voltages significantly reduce noise margins and increase variations in process, device and design parameters. Consequently, it is steadily more difficult to control the fabrication process precisely enough to maintain uniformity. The inherent randomness of materials used in fabrication at nanoscopic scales means that performance will be increasingly variable, not only from die-to-die but also within each individual die. Parametric variability will be compounded by degradation in nanoscale integrated circuits resulting in instability of parameters over time, eventually leading to the development of faults. Process variation cannot be solved by improving manufacturing tolerances; variability must be reduced by new device technology or managed by design in order for scaling to continue. Similarly, within-die performance variation also imposes new challenges for test methods.In an attempt to address these issues, Low-Power High-Resolution Analog-to-Digital Converters specifically focus on: i) improving the power efficiency for the high-speed, and low spurious spectral A/D conversion performance by exploring the potential of low-voltage analog design and calibration techniques, respectively, and ii) development of circuit techniques and algorithms to enhance testing and debugging potential to detect errors dynamically, to isolate and confine faults, and to recover errors continuously. The feasibility of the described methods has been verified by measurementsfrom the silicon prototypes fabricated in standard 180nm, 90nm and 65nm CMOS technology.

Readers will be enabled to implement ADCs as continuous-time delta-sigma (CT ) modulators, offering simple resistive inputs, which do not require the use of power-hungry input buffers, as well as offering inherent anti-aliasing, which simplifies system integration.

In this book, the authors outline detailed design methodology for fast frequency hopping synthesizers for RF and wireless communications applications. The developed techniques in the book can help in designing very low noise, high speed fractional-N frequency synthesizers.

In the world of optical data communications this book will be an absolute must-read. It focuses on optical communications for short and very short distance applications and discusses the monolithic integration of optical receivers with processing elements in standard CMOS technologies.

Informed by the authors' long experience in the subject, this step-by-step presentation of the topic provides a coherent and seamless framework that encompasses passive and active filters and includes the most modern and up-to-date design methodologies.

Following this trend of system integration, this eventually leads to the integration of analog and d- ital components in one chip, resulting in mixed-signal ICs: digital components are required because signal processing is preferably done in the digital - main;

Nanometer CMOS RFICs for Mobile TV Applications focuses on how to break the trade-off between power consumption and performance (linearity and noise figure) by optimizing the mobile TV front-end dynamic range in three hierarchical levels: the intrinsic MOSFET level, the circuit level, and the architectural level.

In this book, the authors outline detailed design methodology for fast frequency hopping synthesizers for RF and wireless communications applications. The developed techniques in the book can help in designing very low noise, high speed fractional-N frequency synthesizers.

In the world of optical data communications this book will be an absolute must-read. It focuses on optical communications for short and very short distance applications and discusses the monolithic integration of optical receivers with processing elements in standard CMOS technologies.